OM6681
Description
Features
Applications

OM6681x dual core system, include Application Core and SensorHubCore, there are several shared System Peripheral blocks between AppCore and SensorHubCore. Application core is a Coretex-M33S core plus multiple Master/slave AHB standard system.  SensorHubCore is a Coretex-M33S core plus rich peripheral interfaces. The two cores can communicate with IPC channels, memories and peripherals.



  • BT Features

  • •         Support full BT 5.2 dual-mode feature (BT BR/EDR and BLE)

  • •         Support A2DP/AVCTP/AVDTP/AVRCP/HFP/HSP/SPP/SMP/ATT/GAP/GATT/  RFCOMM/SDP/L2CAP

  • •         Support LC3 decoder to enhance audio quality

  • •         Support Connected isochronous Groups for TWS application

  • •         Support Broadcast isochronous stream and group

  • RF Features

  • •         -96dBm sensitivity @BLE 1Mbps, TX power 10dBm

  • •         -93dBm sensitivity @BLE 2Mbps, TX power 10dBm

  • •         -92dBm sensitivity @BT 1Mbps, TX power 0dBm

  • •         -92dBm sensitivity @BT 2Mbps, TX power 0dBm

  • •         9.0mA RX@BLE

  • •         9.0mA TX (0dBm) @BLE

  • •         RSSI (1db resolution)

  • MCU & Memory

  • •         208MHz ARM M33S + 96MHz M33S

  • •         16K D-CACHE + 16K I-CACHE

  • •         512KB(Core0) + 96KB(Core1) Internal RAM

  • •         Serial Flash: 2MB

  • •         PSRAM

  •     •         OM6681QWKDL: -

  •     •         OM6681QWKDP: 8MB

  • Clocks

  • •         32MHz crystal, 32MHz RC, 32.768KHz crystal, 32.768KHz RC

  • •         Three 32.768KHz clock outputs in retention state

  • Power Management

  • •         Deep sleep power: 14uA (RTC on, 384K RAM retention), 0.25uA/8K for retention RAM adding

  • •         MCU power consumption: 4mA in 64MHz, adding 20uA/MHz for frequency increasing

  • •         Supply voltage range 2.4V to 5.5V

  • •         Built-in 2 BUCK DCDC converters

  • •         Built-in PMU&Charger (25mA ~ 300mA, step: 25mA)

  • Software

  • •         Full compliant with BT dual-mode 5.2, complete power-optimized stack, including controller and host

  • •         Sample applications and profiles

  • •         Supports OTA

  • •         Secure boot

  • •         Supports Free RTOS and driver interface

  • •         Supports Lite OS and driver

  • •         Supports LC3

  • •         Supports AAC/SBC/mSBC/CVSD decoder

  • •         Supports MP2/MP3/WMA/WAV/FLAC/AAC/ M4A(AAC) decoder

  • Peripherals

  • •         (8 + 8) channels DMA

  • •         UART interface up to 5

  • •         I2S interface up to 3

  • •         Up to 46 GPIOs

  • •         I2C master and slave interface up to 4

  • •         SPI master and slave interface up to 3

  • •         Two flash controllers + PSRAM controller + graphic controller

  • •         Support PSRAM QSPI/OPI, SDR, DDR

  • •         eMMC/SD SDR mode up to 96MHz

  • •         Watchdog to prevent system dead lock x 2

  • •         RTC

  • •         LED Driver (16*2.5mA, max16*6mA)

  • •         32-bit timers up to 5

  • •         8 single-end or differential-end 12-bit GPADC

  • •         Fully programmable pin assignment

  • •         USB full speed device

  • •         QDEC x 3

  • •         Capacitive Sensing Interface (Minimum detection capacitance difference: 0.2pF)

  • •         Independent PWMs x 5

  • Security and Encryption

  • •         AES hardware encryption 256

  • •         ECDSA 256

  • •         SHA256

  • •         Secure boot

  • •         Secure debug

  • •         Secure storage

  • •         Hardware True Random Number Generator

  • •         4Kbit EFUSE

  • Audio

  • •         Acoustic Echo Cancellation

  • •         Noise Suppression

  • •         Adaptive Dual Microphone

  • •         Wind Noise Reduction

  • •         Howling Suppression Control

  • •         Dynamic Range Control

  • •         Multi-band EQ

  • •         Stereo Audio DAC

  •     •         97dB SNR

  •     •         88dB THD

  •     •         Sample rates from 8Khz to 96KHz

  • •         Stereo Audio ADC

  •     •         95dB SNR

  •     •         85dB THD

  •     •         Sample rates from 8Khz to 96KHz

  • •         24-bit audio resolution

  • •         Two analog MICs/two digital MICs

  • Display Interface

  • •         SPI/DSPI/QSPI controller for Flash and display

  • •         QSPI/OPI controller for PSRAM

  • •         Graph2D

  •     •         Image decoder

  •     •         Image scaling

  •     •         Image decompression

  •     •         Gradient overlay

  • Package and Work Environment

  • •         QFN68 (7*7*mm 0.35mm pitch)

  • •         -40℃ ~ +85℃


The OM6681x integrated circuit has a fully integrated radio transceiver and base band processor for Bluetooth® Smart. It can be used as an application processor as well as a data pump in fully hosted systems. Such as Wearables, Health and medical, Bluetooth speaker, Smart home kit.etc.



Parameter
    • BT Version
      BLE 5.2
    • Core
      M33S
    • Max Speed
      208MHz + 96MHz
    • SRAM
      512KB
    • Flash
      1MB
    • Packages
      QFN68 7*7mm
    • Supply Voltage
      2.4V - 5.5V
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